manuais ADC ICX-250

Adc ICX-250 Especificações (197 páginas)

Marca: Adc | Categoria: Comutadores de rede | Tamanho: 2.98 MB |

Inglês

Índice

ST72325xx

1

Table of Contents

2

1 DESCRIPTION

7

2 PIN DESCRIPTION

8

3 REGISTER & MEMORY MAP

17

4 FLASH PROGRAM MEMORY

21

5 CENTRAL PROCESSING UNIT

24

. interrupt enable

35

7 INTERRUPTS

36

8 POWER SAVING MODES

45

9 I/O PORTS

50

10 ON-CHIP PERIPHERALS

56

Returns the buffered

75

/CC[1:0])

77

Δ OCiR =

79

Δ OCiR = Δt

79

WAKE PCE PS PIE

104

CH2 CH1EOC SPEED ADON 0 CH0

132

11 INSTRUCTION SET

136

12 ELECTRICAL CHARACTERISTICS

142

13 PACKAGE CHARACTERISTICS

174

15 KNOWN LIMITATIONS

192

16 REVISION HISTORY

196

Adc ICX-250 Manual do Utilizador (31 páginas)

Marca: Adc | Categoria: Comutadores de rede | Tamanho: 1.64 MB |

Alemão

Índice

ICx radiation

1

ICx radiation products

2

ICx radiation product focus

3

 Physik im identiFINDER

4

 http://www.orau.org

5

Anforderungen

6

Herausforderung

6

1700 1800 1900 2000

10

Time (ns)

10

March 20, 2007

11

© BP presentation name

11

Vorteile

11

GEANT-Simulation

13

Detektorstabilisierung

14

Situation

15

Gamma-Signale

17

LED-Signale

17

 LED-Signale  Rechteckform

18

 LED/Gamma-Diskriminierung

18

Signalanalyse im identiFINDER

19

Adc ICX-250 Especificações (279 páginas)

Marca: Adc | Categoria: Comutadores de rede | Tamanho: 2.46 MB |

Inglês

Índice

ST72361xx-Auto

1

Contents

2

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Contents ST72361xx-Auto

12

List of tables

13

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List of figures

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1 Description

19

Description ST72361xx-Auto

20

Kbytes)

20

ST72361xx-Auto Description

23

2 Register and memory map

27

3 Flash program memory

30

3.4 ICC interface

31

32/279 Doc ID 12468 Rev 3

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3.7 Related documentation

33

3.8 Register description

33

4 Central processing unit

34

Arithmetic management bits

35

Interrupt management bits

36

4.3.5 Stack pointer (SP)

37

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5.1 Introduction

39

5.2 Main features

39

5.3 Phase locked loop

39

5.4 Multi-oscillator (MO)

40

5.5.1 Introduction

41

42/279 Doc ID 12468 Rev 3

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5.5.5 Internal watchdog reset

43

Monitoring the V

44

main supply

44

5.6.3 Low power modes

45

5.6.4 Interrupts

45

5.6.5 Register description

46

Application notes

47

6 Interrupts

48

Servicing pending interrupts

49

Non-maskable sources

50

Maskable sources

50

Doc ID 12468 Rev 3 51/279

51

Interrupts ST72361xx-Auto

54

ST72361xx-Auto Interrupts

55

Table 16. Interrupt mapping

55

6.6 External interrupts

56

6.6.2 Register description

58

000000TLISTLIE

59

7 Power saving modes

61

7.3 Wait mode

62

7.4 Halt mode

63

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7.5 Active halt mode

65

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7.6.1 Register description

69

] Dividing factor

70

8 I/O ports

71

8.2.2 Output modes

72

8.2.3 Alternate functions

72

DATA BUS

73

Analog alternate function

74

8.3 I/O port implementation

75

8.4.2 Interrupt ports

76

8.4.3 Pull-up input port

77

8.5 Low power modes

78

8.6 Interrupts

78

ST72361xx-Auto I/O ports

79

9 Window watchdog (WWDG)

80

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9.9 Interrupts

85

9.10 Register description

85

Caution:

90

11.1 Introduction

91

11.2 Functional description

92

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93

11.2.8 Input capture function

94

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11.3 Register description

97

Auto-Reload Register (ARTARR)

98

PWM control register (PWMCR)

99

0 0 CS2 CS1 CIE2 CIE1 CF2 CF1

100

12 16-bit timer

102

12.3 Functional description

103

Returns the buffered

104

12.3.2 External clock

105

12.3.3 Input capture

106

12.3.4 Procedure

107

12.3.5 Output compare

108

12.3.6 Procedure

109

 OCiR =

109

 OCiR = t

109

110/279 Doc ID 12468 Rev 3

110

12.3.8 One pulse mode

111

112

Procedure

114

12.4 Low power modes

115

12.5 Interrupts

115

12.6 Summary of timer modes

116

12.7 Register description

116

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13 8-bit timer (TIM8)

124

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13.3.2 Input capture

128

13.3.3 Output compare

129

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13.3.5 One pulse mode

132

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135

13.4 Low power modes

136

13.5 Interrupts

136

13.6 Summary of timer modes

137

13.7 Register description

137

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13.7.7 Counter register (CTR)

141

14.3.1 Functional description

144

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14.3.3 Master mode operation

146

14.3.5 Slave mode operation

147

14.5 Error flags

148

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149

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14.6 Low power modes

151

14.8 Register description

152

14.7 Interrupts

152

D7 D6 D5 D4 D3 D2 D1 D0

155

15.1 Introduction

156

15.2 SCI features

156

15.3 LIN features

157

15.4 General description

157

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15.5.3 Serial data format

159

15.5.4 Transmitter

159

Character transmission

160

Break characters

160

15.5.5 Receiver

161

Noise error

162

Framing error

162

Break character

162

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163

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15.5.8 Parity control

165

15.6 Low power modes

166

15.7 Interrupts

166

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168

Doc ID 12468 Rev 3 169/279

169

15.8.4 Data register (SCIDR)

170

15.9.1 Entering LIN mode

173

15.9.2 LIN transmission

174

15.9.3 LIN reception

175

LIN slave parity

176

15.9.4 LIN error detection

177

LIN header time-out error

178

LIN header length

179

Mute mode and errors

179

15.9.5 LIN baud rate

180

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181

182/279 Doc ID 12468 Rev 3

182

Example:

183

LIN slave systems

183

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185

0000LPFR3LPFR2LPFR1LPFR0

188

Examples of LDIV coding:

189

190

16.1 Introduction

193

16.2 Main features

193

16.3 General description

194

16.4 Functional description

195

Data Frame

196

Next Data Frame

196

16.4.3 Receiver

198

Idle character

199

Overrun error

199

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201

16.4.7 Parity control

202

16.5 Low power modes

203

16.6 Interrupts

203

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16.8 Register description

205

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16.8.5 Data register (SCIDR)

210

Table 80. Baud rate selection

213

17.1 Introduction

214

17.2 Main features

214

17.3 Functional description

214

17.3.2 A/D conversion

215

17.4 Low power modes

216

17.5 Interrupts

216

17.6 Register description

216

18 Instruction set

219

18.1.1 Inherent

220

18.1.2 Immediate

221

18.1.3 Direct

221

18.1.5 Indirect (short, long)

221

Indirect (short)

222

Indirect (long)

222

Indirect indexed (short)

222

Indirect indexed (long)

222

18.2 Instruction groups

223

18.2.1 Using a prebyte

224

19 Electrical characteristics

227

19.3 Operating conditions

230

19.4.2 On-chip peripherals

233

19.5.2 PLL characteristics

236

19.7 Memory characteristics

237

19.8 EMC characteristics

238

Electrostatic discharge (ESD)

239

19.10.2 ICCSEL/ V

247

General PCB design guidelines

254

ADC accuracy

255

Figure 123. ADC accuracy

256

20 Package characteristics

257

258/279 Doc ID 12468 Rev 3

258

20.3 Thermal characteristics

259

21.1 Introduction

260

21.2 Flash devices

260

Option byte 1

261

Doc ID 12468 Rev 3 267/279

267

22 Development tools

268

23 Important notes

269

Workaround

270

Doc ID 12468 Rev 3 271/279

271

23.1.4 Unexpected reset fetch

272

SCI mode

273

Occurrence

274

LIN mode

274

Analysis

274

23.3 ROM devices only

275

24 Revision history

276

Adc ICX-250 Manual do Utilizador (8 páginas)

Marca: Adc | Categoria: Comutadores de rede | Tamanho: 0.82 MB |

Inglês

Índice

BROCADE

1

ICX 6610

1

Large Campus

4

Small/Medium-size

4

Campus

4

CLOUD-OPTIMIZED NETWORK

5

ACQUISITION

5

MAXIMIZING INVESTMENTS

5

System Architecture

6

Management

7

DATA SHEET

8

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