ADC 10 Manual do Utilizador descarregar pdf (Página 3)

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ADC10 Introduction

27-3

ADC10

Figure 27−1. ADC10 Block Diagram

Sample

and

Hold

10−bit SAR

Divider

/1 .. /8

ACLK

MCLK

SMCLK

ADC10SC

TA0_1

TA1_0

Data Transfer

Controller

RAM, Flash, Peripherials

R−

R+

REF+

ADC10ON

INCHx

REFBURST

ADC10SSELx

ADC10DIVx

SHSx

ADC10SHTx

MSC

ENC

BUSY

ADC10DF

ADC10CLK

SREF2

ADC10TB ADC10B1ADC10CT

ISSH

ADC10SR

ADC10OSC

Ref_x

S/H

Convert

SAMPCON

Sync

Sample Timer

/4/8/16/64

SHI

ADC10SA

REFON

INCHx=0Ah

2_5V

1.5V or 2.5V

Reference

Ref_x

SREF1

000111

SREF0

CONSEQx

INCHx=0Bh

Auto

ADC10MEM

REFOUT

SREF1

1001

1000

0010

0001

0011

0100

0101

0110

0111

0000

1011

1010

0001

1111

1110

1101

1100

A12

†

A13

†

A14

†

A15

†

†Not all devices support all channels. See the devices specific datasheet for details.

REF−

eREF−

TA1_1

1 2 3 4 5 6 7 8 ... 31 32

Chapter 27 1
27.1 ADC10 Introduction 2
ADC10 Introduction 3
27.2 ADC10 Operation 4
27.2.4 Auto Power-Down 6
Figure 27−3. Sample Timing 7
Sample Timing Considerations 7
27.2.6 Conversion Modes 9
Sequence-of-Channels Mode 11
Repeat-Single-Channel Mode 12
Using the MSC Bit 14
Stopping Conversions 14
ADC10 Operation 15
One-Block Transfer Mode 16
Two-Block Transfer Mode 18
Continuous Transfer 20
DTC Transfer Cycle Time 20
27.2.10 ADC10 Interrupts 23
27.3 ADC10 Registers 24
ADC10 Registers 29
ADC10AE0x 29
ADC10AE1x 29
76543210 31

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