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ADS7865

SBAS441C –OCTOBER 2008–REVISED APRIL 2012

www.ti.com

Power-Down Modes and Reset

The auto-nap power-down mode is very similar to

the nap mode. The only differences are the methods

The ADS7865 has a comprehensive built-in power-

of powering down and waking up the device. The

down feature. There are three power-down modes:

Configuration Register bit AN is only used to

deep power-down, nap power-down, and auto-nap

enable/disable this feature. If the auto-nap mode is

power-down. All three power-down modes are

enabled, the ADS7865 turns off the biasing

activated with the rising WR edge after having been

automatically after finishing a conversion; thus, the

activated by asserting the corresponding bit in the

end of conversion actually activates the auto-nap

Configuration Register (DP = '1', N = '1', or AN = '1').

power-down. The device powers down within 200ns

All modes are deactivated by de-asserting the

in this mode, as well. Triggering a new conversion by

respective bit in the Configuration Register. The

applying a CONVST pulse returns the device to

contents of the Configuration Register are not

normal operation and automatically starts a new

affected by any of the power-down modes. Any

conversion six CLOCK cycles later. Therefore, a

ongoing conversion aborts when deep or nap power-

complete conversion cycle takes 22 CLOCK cycles;

down is initiated. Table 15 lists the differences among

thus, the maximum throughput rate in auto-nap

the three power-down modes.

power-down mode is reduced to 1.45MSPS.

In deep power-down mode, all functional blocks

To issue a device reset, a write access to the

except the digital interface are disabled. The analog

Configuration Register must be generated to set

block has its bias currents turned off. In this mode,

A[2:0] = '101'. With the rising edge of the WR input,

the power dissipation reduces to 1μA within 2μs. The

the entire device is forced into reset. After

wake-up time from deep power-down mode is 1μs.

approximately 20ns, the parallel interface becomes

In nap power-down mode, the ADS7865 turns off active again.

the biasing of the comparator and the mid-voltage

buffer within 200ns. The device goes into nap power-

down mode regardless of the conversion state.

Table 15. Power-Down Modes

POWER-DOWN ENABLED ACTIVATION RESUMED DISABLED

TYPE BY ACTIVATED BY TIME BY REACTIVATION TIME BY

Deep DP = '1' Rising WR edge 2μs DP = '0' 1μs DP = '0'

Nap N = '1' Rising WR edge 200ns N = '0' 6 clocks N = '0'

Each end of

Auto-nap AN = '1' 200ns CONVST pulse 6 clocks AN = '0'

conversion

1 2 ... 17 18 19 20 21 22 23 24 25 26 27 ... 32 33

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