ADC 320F Especificações descarregar pdf (Página 5)

List of Tables

1-1 ADC Registers .............................................................................................................. 11

1-2 Comparison of Single and Cascaded Operating Modes ............................................................. 17

1-3 Values for ADCCHSELSEQn Registers (MAX_CONV1 Set to 6) ................................................... 20

1-4 Values for ADCCHSELSEQn (MAX_CONV1 set to 2) ................................................................ 23

1-5 Values After Second Autoconversion Session ......................................................................... 23

1-6 Input Triggers ............................................................................................................... 23

1-7 Clock Chain to the ADC ................................................................................................... 26

1-8 Power Options .............................................................................................................. 27

2-1 ADC Control Register 1 (ADCTRL1) Field Descriptions .............................................................. 34

2-2 ADC Control Register 2 (ADCTRL2) Field Descriptions .............................................................. 35

2-3 ADC Control Register 3 (ADCTRL3) Field Descriptions ............................................................. 37

2-4 Maximum Conversion Channels Register (ADCMAXCONV) Field Descriptions .................................. 39

2-5 Bit Selections for MAX_CONV1 for Various Number of Conversions .............................................. 39

2-6 Autosequence Status Register (ADCASEQSR) Field Descriptions ................................................. 40

2-7 State of Active Sequencer ................................................................................................ 40

2-8 ADC Status and Flag Register (ADCST) Field Descriptions ......................................................... 41

2-9 ADC Reference Select Register (ADCREFSEL) Field Descriptions ................................................. 43

2-10 ADC Offset Trim Register (ADCOFFTRIM) Field Descriptions ...................................................... 43

2-11 CONVnn Bit Values and the ADC Input Channels Selected ........................................................ 44

SPRU812A – September 2007 – Revised October 2007 List of Tables 5

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ADC 320F Especificações Página 5